Floor plan driven distributed redesin of RTL circuit : A transformation approach
| Author | Aljazeeri,Yusuf | |
|---|---|---|
| metadata.dc.contributor.department | Case Western Researve University | |
| metadata.dc.date.accessioned | 2026-09-20T15:52:44Z | |
| Publication date | 1998 | |
| Degree level | Doctoral | |
| Abstract | Abstract : In this dissertation we present redesign transformations that can be applied to high-level circuit descriptions. The redesign transformations transform the register transfer level (RTL) description of a finite state machine (FSM) de- scription of a controller or a datapath description to another RTL datapath or FSM description. These transformations preserve the original circuit func- tionalities while altering the cost of the circuit area, delay, or average power consumption. The main objective of redesign is to achieve better circuit per- formance, smaller area, and/or less power consumption. Two types of RTL transformations, FSM controller transformations and datapath transformations, will be presented. The controller transformations are used to transform a centralized con- troller FSM into a distributed controller which has multiple FSMs. The con- cept of distributed controller is based on partitioning a datapath into func- tional blocks. The centralized controller is duplicated into multiple local con- trollers. Each local controller produces a subset of the original control signals in order to control one functional block. Each functional block is placed close to its local controller during the layout phase, which leads to shorter control wires. Activity is localized within the circuit as well, which reduces transistors switching and ultimately power consumption. The centralized design and two types of distributed controller designs will be compared. In the first type of distributed controller design (NCLC), none of the local controllers communicate with each other, and in the second type (CLC), the local controllers do communicate. Experimental results show that circuit with distributed controllers have lower critical path delay and less power consumption than equivalent circuit with a centralized controller. Moreover, at sub-micron level where the gate delay is negligible and wire delay is dominant the distributed controller design has better performance than the centralized controller. Datapath transformation will be presented also. An original design will be transformed into another design preserving the functionality of the circuit to let the designer explore different designs with different area, delay and power cost. | |
| metadata.dc.identifier.other | Drupal node 4207 | |
| metadata.dc.identifier.other | https://digitalrepository.uob.edu.bh/en/dar/floor-plan-driven-distributed-redesin-rtl-circuit-transformation-approach | |
| metadata.dc.identifier.uri | http://165.227.56.122/handle/123456789/7349 | |
| Language | en | |
| Link | https://digitalrepository.uob.edu.bh/en/_flysystem/fedora/2025-07/001638_floor_plan_driven_distributed_redesign_rtl_circuit_-_a_transformation_approach.pdf | |
| Subject | Electronic digital computers--Circuits | |
| Subject | Logic circuits | |
| Subject | Logic design | |
| Title | Floor plan driven distributed redesin of RTL circuit : A transformation approach | |
| Type | Doctoral Dissertation |
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